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3PEAK Unveils Automotive LiDAR VCSEL Driver White Paper, Detailing Key Design Principles for High-Voltage, Fast-Response Driver ICs

From:Internet Info Agency 2026-06-17 18:01:00

**3PEAK Releases White Paper on VCSEL Driver Technology for Automotive LiDAR, Detailing Key Requirements for Transmitter Driver ICs in Solid-State LiDAR Systems** 3PEAK has released a white paper on VCSEL driver technology for automotive LiDAR, systematically outlining the critical technical requirements for transmitter driver ICs in pure solid-state LiDAR systems. Current automotive LiDAR is evolving toward 2D addressable pure solid-state VCSEL arrays, imposing stricter demands on multi-channel integration, high peak current delivery, nanosecond-level pulse edge control, and eye safety. The white paper emphasizes that dToF (direct Time-of-Flight) ranging requires injecting high-peak, narrow-pulse-width, fast-edge current pulses at precisely defined moments. To meet both performance and safety constraints, driver ICs must support a voltage rating of 60V–80V. This voltage budget stems from three main factors: the forward voltage drop across multi-junction VCSELs (e.g., 6- to 10-junction stacks), inductive voltage spikes caused by parasitic inductance (V = L·di/dt), and the need to maintain sub-nanosecond rise times. Every additional nanosecond in edge transition time increases ranging error by approximately 15 cm. To deliver tens of amperes of instantaneous current, a “high-side charge + low-side pulse” architecture is adopted: the high-side circuit pre-charges local energy storage capacitors, while the low-side switch releases this energy instantaneously during emission, effectively decoupling slow charging from fast pulsing. The system comprises four key blocks: a Boost converter, a high-side charging IC, an array of energy-storage capacitors, and a low-side pulsing IC. The charging topology can be either constant-current or resonant—constant-current offers deterministic timing and better EMC performance, whereas resonant charging achieves higher efficiency at the cost of greater complexity. Package design directly impacts loop parasitic inductance; minimizing parasitics is critical to suppressing turn-off overshoot. 2D VCSEL arrays enable electronic addressing to illuminate regions sequentially, improving photon utilization, reducing thermal load, and eliminating mechanical scanning components. This architecture supports region-level power control over high-reflectivity areas—by individually reducing drive current or the number of emitting elements corresponding to strong reflections—to prevent receiver saturation and pixel blooming at the source. Row-column addressing combined with a dual-register ping-pong mechanism significantly reduces the number of control lines and enables seamless parameter switching. Additionally, an alternating large/small pulse strategy allows the system to simultaneously optimize detection of both near and far targets. Although fast turn-off shortens pulse width, it introduces two critical issues: first, inductive ringing can cause secondary forward biasing of the VCSEL, generating false echoes; second, the negative di/dt during turn-off induces high-voltage spikes—measured up to 110V in practice—threatening device reliability and potentially reverse-biasing the VCSEL. Mitigation strategies include layout optimization to minimize parasitic inductance, clamping overshoot below 80V, and employing programmable slew-rate control with active flyback clamping techniques. Regarding eye safety, the single-pulse energy of VCSELs far exceeds the IEC 60825-1 Class 1 limit, necessitating an extremely low duty cycle (<0.1%) to ensure compliance in average optical power. In the event of a low-side switch short-circuit fault, the laser could shift to continuous-wave (CW) operation, causing average power to surge by over 1,000× the safety limit. Therefore, the system must comply with automotive functional safety standards at ASIL B or higher, guaranteeing that no single-point failure exceeds the Maximum Permissible Exposure (MPE). A dual-chip architecture provides independent safety redundancy: even if the low-side fails, the high-side can cut off charging and actively discharge the storage capacitors, automatically extinguishing the laser once stored energy is depleted. In terms of product selection: - **Flash solid-state LiDAR** employs a high-side IC (e.g., TPM8909Q/AQ) paired with a low-side IC (e.g., TPM8918Q/BQ), supporting 16-channel 80V energy storage and 8-channel 20A pulsing, respectively, with cascading capability for large arrays. - **Scanning/MEMS-based LiDAR** uses external GaN FETs driven by automotive- or industrial-grade GaN drivers (e.g., TPM1025Q, TPM2025), suitable for single/few-channel EELs or 1D VCSELs. - **High-performance single-channel applications** leverage the integrated driver TPM8915Q, which integrates an 80V/50A power stage in a WLCSP package with parasitic inductance below 0.1nH, enabling pulse widths as narrow as 1ns. The entire portfolio includes both automotive- and industrial-grade variants, and integrated solutions reduce BOM count from over 50 components to just 20–30. Next-generation products will target configurations with more than 24 channels, higher output currents, and SPI interfaces.

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